E24 Core

The E24 core of the JH-7110 has the following features.

• Fully compliant with the RISC-V 32 ISA specification
• RV32IMFC E24 Core
  • 16 KB I-cache with 32 Byte cache line
  • 4 Region Physical Memory Protection
• CLIC with support for up to 127 interrupts with 16 priority levels
• Support JTAG as Debug port
• Support AHB-Lite system bus for 2 GB memory map