Power-Up Sequence
JH-7110 DevKit has 3 power supplies, VDD, AVDL, and AVDH. VDD and AVDL are both core power supplies and while separate pins are used for noise isolation purposes.
The recommended power sequence is that from digital core voltage to analog I/O voltage and from low voltage level to high voltage level. This is not considered a constraint, but instead, a guideline, as it could result in the best-case operating scenario, where the leakage currents during power up are kept to a minimum.
The following diagram shows the recommended power-on sequence of different power
groups.
| Sequence | Interval |
|---|---|
| T1 | 100 us |
| T2 | 300-500 us |
| T3 | 50-100 us |
| T4 | 300-500 us |
| T5 | 300-500 us |
| T6 | 50-100 us |
| T7 | >10 ms |