Device Tree Configuration

In the file jh7110.dts:

i2c0: i2c@10030000 {
		compatible = "snps,designware-i2c";
		reg = <0x0 0x10030000 0x0 0x10000>;
		clocks = <&clkgen JH7110_I2C0_CLK_CORE>,
			 <&clkgen JH7110_I2C0_CLK_APB>;
		clock-names = "ref", "pclk";
		resets = <&rstgen RSTN_U0_DW_I2C_APB>;
		interrupts = <35>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

The following list provides explanations for the parameters included in the above code block.

• compatible: Compatibility information, used to associate the driver and its target device.
• reg: Register base address "0x10030000" and range "0x10000".
• clocks: The clocks used by the I2C module.
• clock-names: The names of the above clocks.
• resets: The reset signals used by the I2C module.
• reset-names: The names of the above reset signals.
• interrupts: Hardware interrupt ID.
• status: The work status of the I2C, "enabled" or "disabled".

In the file jh7110-common.dtsi:

&i2c0 {
		clock-frequency = <100000>;        
		i2c-sda-hold-time-ns = <300>;      
		i2c-sda-falling-time-ns = <510>;   
		i2c-scl-falling-time-ns = <510>;   
		auto_calc_scl_lhcnt;
		pinctrl-names = "default";
		pinctrl-0 = <&i2c0_pins>;
		status = "disabled";

		ac108_a: ac108@3b {                    // i2c_client 1
			compatible = "x-power,ac108_0";
			reg = <0x3b>;
			#sound-dai-cells = <0>;
			data-protocol = <0>;
		};

		wm8960: codec@1a {                    //i2c_client 2
			compatible = "wlf,wm8960";
			reg = <0x1a>;
			#sound-dai-cells = <0>;

			wlf,shared-lrclk;
		};
};

The following list provides explanations for some parameters included in the above code block.

• clock-frequency: Use this bit to set the I2C sample rate.
• i2c-sda-hold-time-ns: Use this bit to set the hold time of the SDA line.
• i2c-sda-falling-time-ns: Use this bit to set the falling time of the SDA line.
• i2c-scl-falling-time-ns: Use this bit to set the falling time of the SCL line.