Overview

• 64-bit High performance RISC-V CPU (U74) Dual cores for main general computing
• 32bit RISC-V CPU core (E24) for low power and real control/configure tasks as co-processor
• L2-cache up to 2MB cache size
• Easy Master (EZMAST) works as event co-processor for high efferent events handling
• Dual DMA controller for memory-to-memory and memory-to-peripheral data exchange
• Support Linux/VxWorks/RTOS