The Pin control (Pinctrl) framework of the JH7110 SoC platform is mainly made
up of the following three components.
Pinctrl Core: The core layer of the pin control
framework. The states of default, sleep or idle, refer to the power management
status of pin control.
Pinctrol Mux: Pin multiplexing functions.
Pinctrl Conf: Pin configuration settings.
The following figure shows the relationship of them. Figure 1. Pin Control Framework
Pin configuration can be different for a specific system work mode. For example, the
default pin configuration works for normal mode, and the power-saving pin configuration
works for standby mode. Thus you can use the above pin control framework to manage pin
configuration based on the work mode of the device.