U74 MC

The U74 quad-core of JH-7110 has the following features.

• Fully compliant with the RISC-V ISA specification
• 4 × RV64GC U74 Application Cores
  • 32 KB L1 I-cache with ECC
  • 32 KB L1 D-cache with ECC
  • 8 Region Physical Memory Protection
  • Sv39 Virtual Memory support with 38-bit (Physical Address)
• 1x RV64IMAC S7 Core
  • 16 KB L1 I-Cache with ECC
  • 8 KB DTIM with ECC
  • 8 Region Physical Memory Protection
• U74 and S7 cores are fully-coherent
• Integrated 2 MB L2 Cache with ECC
  • The L1 Instruction Cache and the L2 Cache can be configured into high-speed deterministic SRAMs
• Real-time Capabilities, and internal time counting integrated
• Debug with instruction trace