Power Pin Voltage

The following table shows the voltage information for each power pin.
Table 1. Power Pin Voltage Information
Power Pin in PMIC Package Ball Name Power Pin Index Voltage (V) Comment
VDD09_AON VDD 1 0.9 Standby mode, all AON relevant power supplies should be on and all others off.
VDD_RTC
VDD09_CPU VDD_CPU 2 0.9 to 1.0 CPU core power supply, which can be adjusted to 1.0 V
VDD18_AON VDD18_OSC 3 1.8 AON domain GPIO, RPIO,RESETN,TESTEN,1.8 V only
VDD18_OTP
VDD1833_AON
VDD1825_GMAC0 VDD1825_GMAC0 4 1.8/2.5 IO voltage for GMAC0, 1.8 V and 2.5 V switchable, AON domain
VDD18_HDMI AVDD_HDMI 5 1.8 HDMI and MIPITX 1.8 V analog power supply which should be powered on first
VDD09_HDMI AVDD09_HDMI 6 0.9 The 0.9 V voltage for Core, PLL, MIPI, and so on, should be powered on after VDD18_HDMI_MIPITX. VDD09_HDMI should be powered on together with VOUT digital.
PVDD_HDMI
VDD18_MIPITX VCC18A_MIPITX 7 1.8
VDD09_MIPITX VDD_MIPITX 8 0.9
VDD18_MIPIRX VCC18A_MIPIRX 9 1.8 MIPI RX 1.8 V analog power supply which should be powered on first
VDD09_MIPIRX VCC09A_MIPIRX 10 0.9 MIPI RX 0.9 V power supply, which should be powered on after VDD18_MIPIRX
VDD33_USB2 VCCA33_USB 11 3.3 3.3 V USB interface voltage, which should be powered on after the 1.8 V and 0.9 V voltage, and powered off first.
VDD09_TOP AVDD09_USB 12 0.9
AVDL_PCIE0
AVDL_PCIE1
VDD_PLL0
VDD_PLL1
VDD_PLL2
VDD_DDR DDR PHY core power 0.9 V
VDDPLL_DDR DDR PHY PLL power 0.9 V
VDD18_TOP VCCA18_PLL0 13 1.8
VCCA18_PLL1
VDD18_TEMP
VDDA18_TEMP
VCCA18_PLL2
AVDH_PCIE0
AVDH_PCIE1
VCCA18_USB
VDDQ11_DDR VDDQ_DDR 14 1.1 DDR PHY IO and clock IO voltage, 1.1 V
VDDQCK_DDR
VDD1833_GPIO1 VDD1833_GPIO1 15 1.8/3.3 GPIO Group 1 voltage, 1.8 V and 3.3 V switchable
VDD1833_GPIO2 VDD1833_GPIO2 GPIO Group 2 voltage, 1.8 V and 3.3 V switchable
VDD1833_GPIO3 VDD1833_GPIO3 GPIO Group 3 voltage, 1.8 V and 3.3 V switchable
VDD1833_GPIO4 VDD1833_GPIO4 16 GPIO Group 4 voltage, 1.8 V and 3.3 V switchable
VDD1833_SD0 VDD1833_SD0 SD0 IO voltage, 1.8 V and 3.3 V switchable
VDD1833_QSPI VDD1833_QSPI 16 1.8/3.3 QSPI IO voltage, 1.8 V and 3.3 V switchable
VDD1825_GMAC1 VDD1825_GMAC1 17 1.8/2.5 GMAC IO voltage, 1.8 V and 2.5 V switchable

Make sure you understand the following statements.

  1. Every power pin stands for a PMIC/DC-DC power output, whose ON/OFF, sequence, voltage, etc. have to be controlled separately. Since GPIO, SD, and QSPI may have up to 2 power voltages, there can be in total 17 power outputs.

  2. CPU uses I2C (GPIO) to configure all PMIC relevant parameters.

For Hot Reset: Follow the same procedure as the cold powering-up, but only remember not to switch off the AON power supplies.