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StarFive JH-7110 Technical Reference Manual Version: Preliminary V2 Date: 2023/4/24 Doc ID: JH7110-TRMEN-001
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Legal Statements
Important legal notice before reading this documentation.
Preface
About this guide and technical support information.
System Overview
Introduction
Block Diagram
Highlighted Feature
System Architecture
Bus Connection
Boot Process
Interrupt
Memory Map
Clock and Reset
Signal Description
GPIO
System Control Registers
Power Management
Overview
Analog PHY Power
Power Modes
Power Supply
Power Mode
PMU
Image Subsystem
ISP
Display Subsystem
Block Diagram
Memory Map
Clock and Reset
Interrupt
Pixel Data Mapping
Control Registers
More Information
Glossary