AMP Introduction

The JH7110 SoC integrates four U74 CPU cores. The Asymmetric Multiprocessing (AMP) architecture partitions these cores to run two independent operating systems simultaneously. In this AMP application:
  • 3 CPU cores run Linux to handle non-real-time workloads, rich applications, networking, and user-space services.
  • 1 CPU core runs RT-Thread RTOS to handle real-time processes, deterministic driver operations, and time-critical data collection.

The two domains communicate through shared memory using the standard virtio-based RPMsg protocol.

Note: If you want to run other AMP architectures, for example, Linux + other RTOS and Linux + Baremetal, you can also refer to this application note for details about how to port the RT-Thread driver code to target environments.

Boot Flow

During the AMP boot flow, Linux and RT-Thread RTOS boot independently. The boot sequence is:
  1. SPL loads visionfive2_fw_payload_amp.img to DDR at 0x40000000.
  2. OpenSBI starts at 0x40000000 and routes each CPU core based on DTS configuration.
  3. CPU cores assigned to Linux boot into U-Boot (S-mode) → Linux kernel.
  4. The CPU core assigned to RT-Thread jumps directly from OpenSBI to RT-Thread — no U-Boot second stage for RTOS.

The domain separation (Linux vs RTOS) is configured in the U-Boot DTS file

Memory Allocation

Table 1. RT-Thread Memory Allocation
Region Address Range Size Notes
OpenSBI 0x40000000 – 0x401FFFFF 2 MB Always retained
U-Boot (S-mode) 0x40200000 – 0x4032FFFF 1.19 MB Reclaimed by Linux after boot
RT-Thread 0x6E800000 – 0x6EFFFFFF 8 MB Initially loaded at 0x40330000 , then relocated to 0x6E800000
Table 2. Linux Memory Allocation
Region Address Range Size
Shared Memory 0×6e400000 - 0×6e7fffff 4 MB
RT-Thread code, stack space (low) 0×6e800000 - 0×6effffff 8 MB
RT-Thread code, stack space (high) 0×6f000000 - 0×6fffffff 16 MB