UART Driver
UART Driver Layer
The UART driver of the JH-7110
SoC Platform has the following layers.
- TTY Core: TTY refers to the TeleType and/or the TeleType Writer. It registers and manages all TTY devices in the core.
- UART Core: It provides a set of API for the UART driver for registration of devices and drivers.
- 8250 UART Driver: It serves as a platform for the initialization and data communication for the JH-7110 SoC Platform.
UART Controller Device Tree Source Code
The following code block shows the device tree source code of the UART
controller.
art0: serial@10000000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x10000000 0x0 0xl0000>; reg-io-width = <4>; reg-shift = <2>; clocks = <&clkgen JH7110_UART0_CLK_CORE>, <&clkgen JH7110_UART0_CLK_APB>; clock-names = "baudclk", ”apb_pclk"; resets = <&rstgen RSTN_U0_DW_UART_APB>, <&rstgen RSTN_U0_DW_UART_CORE>; interrupts = <32>; status = "disabled"; };The following table describes the DT parameters:
| Parameter | Description |
|---|---|
| compatible | Compatibility information, used to associate the driver and its target device |
| reg | Register base address "0x10000000" and range "0x10000". Make sure you do not change the 2 bits that follow, reg-io-width and reg-shift. |
| clocks | The clocks used by the UART module |
| clock-names | The names of the clocks used by the UART module |
| resets | The reset signals used by the UART module |
| interrupts | Hardware interrupt ID |
| status |
The work status of the UART module. To enable the module, set this bit to okay. To disable the module, set this bit to disabled. |
Source Code Structure
The following code block shows the source code tree structure of the UART
driver.
linux
|-- include
| |-- linux
| | |-- serial_8250.h
| | |-- serial_core.h
|-- driver
| |-- tty
| | |-- serial
| | | |-- serial_core.c
| | | |-- 8250
| | | | |-- 8250_dw.c
| | | | |-- 8250_core.c
| | | | |-- 8250.h