PWM Driver

The JH-7110 SoC Platform supports the following features and specifications on the PWM module.

  • 8 PWM channels
  • 32-bit counter/timer facility
  • Single-run or continuous run of PTC counter
  • Programmable PWM mode
  • System clock and external clock sources for timer functionality
  • HI/LO Reference and Capture registers
  • Three-state control for PWM output driver
  • PWM/Timer/Counter functionalities can cause an interrupt to the CPU

Block Diagram

The following figure shows the block diagram of the PWM driver for JH-7110.
Figure 1. Block Diagram
As in the above diagram, besides the general layer of user space for all Linux modules, the PWM subsystem has the following sub-modules.
  • interface: The sub-module provides the sysfs interface to interact with pwm-core.
  • pwm-core: The sub-module builds the core functions of PWM subsystem. It provides PWM control APIs. pwm-core has the following two key components.
    • pwm_chip represents the module which controls PWM generation.
    • pwm_device represents a single physical PWM channel.

The PWM subsystem communicates with the StarFive PWM driver to achieve the PWM functions. The driver registers a pwm_chip through API and provide operation functions (ops) for the pwm-core, which implements the underlying operations such as reading or writing register values and generating PWM signals within the specified time period.

PWM Driver Device Tree Source Code

The following code block shows the device tree source code of the PWM driver.
   ptc: pwm@120d0000 {
            compatible = "starfive,pwm";
            reg = <0x0 0x120d0000 0x0 0x10000>;
            reg-names = "control";
            clocks = <&clkgen JH7110_PWM_CLK_APB>;
            resets = <&rstgen RSTN_U0_PWM_8CH_APB>;
            starfive,approx-freq = <2000000>;
            #pwm-cells=<3>;
            starfive,npwm = <8>;
            status = "disabled";
        };
The following table describes the DT parameters:
Table 1. PWM DT Parameters
Parameter Description
compatible Compatibility information, used to associate the driver and its target device
reg Register base address "0x120D0000" and range "0x10000".
REG-NAMES The names of the registers used by the PWM module
clocks The clocks used by the I2C module
resets The reset signals used by the I2C module
interrupts Hardware interrupt ID
approx-frequency the approximate frequency of PWM
status

The work status of the PWM module. To enable the module, set this bit to okay. To disable the module, set this bit to disabled.

Driver Source Code Structure

The following code block displays the source code structure for the PWM Subsystem.
linux-5.15.0
├── drivers
│   ├── pwm
│   │   ├── core.c
│   │   ├── sysfs.c
│   │   └── pwm-starfive-ptc.